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Design Idea DI-129
PeakSwitch
Application PVR Device PKS606P
33 W (60 W Peak) PVR Power Supply
Power Output 33 W (60 W Pk) Input Voltage 195-265 VAC Output Voltage 3.3 V, 5 V, 17.5 V, 22 V Topology Flyback
Design Highlights
* * * * * Small, low-cost EF25 core size delivers 60 W peak Low component count: only 47 parts High efficiency: 76% at 33 W No-load power consumption <140 mW Meets EN55022 B conducted EMI limits
Operation
The flyback converter shown in Figure 1 uses a member of the PeakSwitch family (U6, a PKS606P) to supply 33 W continuously and peak power pulses of up to 60 W. The controller in U6 receives feedback from the secondary through U5, and based on that feedback, enables or disables the switching of its integrated MOSFET to maintain regulation. A portion of both the 3.3 V and the 5 V outputs are fed into the TL431 (U2), which controls the current through the LED in U5. As the 3.3 V or the 5 V output voltages rise above
their set-point thresholds, U2 pulls additional current through the LED in U5. This in turn increases the base drive to Q1, increasing the current pulled out of the EN/UV pin of U6. Switching cycles are skipped once the EN/UV disable threshold current is exceeded. When the current out of the EN/UV pin falls below the disable threshold, switching cycles are re-enabled. A bias winding (T1, pins 4 and 5) on the transformer is rectified and filtered by D15 and C21, and supplies operating current to U6, through R14. The frequency jitter function within U6 and a Y-type capacitor (C10) across T1 reduce the generation of conducted EMI so that a single common mode choke (L5) and a small X-capacitor (C13) allow the supply meet EN55022B limits with 6 dBV or more of margin. A combination RCD-Zener clamp (R2, R15 C9, D10 and VR2) limits the peak drain-node voltage to below the 700 V rating of the MOSFET integrated within U6.
C10 2.2 nF 1 kV
VR2 1N4764A 100 V C9 2.2 nF 1 kV
1
T1
6 D8 STPS3150
C14 150 F 35 V C16 2200 F 16 V C17 2200 F 16 V C15 220 F 35 V
+22 V 360 mA +17.5 V 670 mA +5 V 1.6 A +3.3 V 1.74 A RTN
-5 V 28 mA
D5 1N4007 F1 2A
D6 1N4007
R15 10 k 1/2 W R2 22 1/2 W
2
7 D9 STPS3150
L3 3.3 H
3 D15 1N4148 C21 47 F 35 V R14 4.7 k
8 D2 SB530
C8 220 F 10 V C6 220 F 10 V
C13 100 nF 275 VAC
L5 19 mH
C20 33 F 400 V
D10 FR106
5
10 D7 SB520
L4 3.3 H
4 EF25
9 R13 15 1W U5B PC817D Q1 2N3904 R17 22 D13 1N4148
C18 100 F 50 V C22 100 nF 50 V
RV1 275 VAC
PeakSwitch U6 D PKS606P
S
VR1 1N4733A 5.1 V
R11 R10 3.92 k 150 1% C11 100 nF 50 V R9 3.3 k U5A PC817D R12 56.2 k 1%
EN/UV BP
D4 1N4007
D3 1N4007
C12 220 nF 50 V
D16 1N4148
R16 1 k
C2 10 F 50 V
U2 LM431A 2%
R8 10 k 1%
PI-4522-110906
Figure 1. Circuit Diagram of a 33 W Continuous, 60 W Peak, PVR Power Supply.
DI-129
November 2006
DI-89 DI-129
Resistor R16 provides the bias current for U2. Resistor R10 sets the gain. Capacitor C22 improves transient responsiveness. Capacitor C11 and resistor R9 roll off the high frequency gain of U2. Capacitor C2 performs a soft-finish function that prevents the 3.3 V and the 5 V output voltages from overshooting their regulation set points during the initial power up of the converter.
PI-4527-110706
All output windings are AC stacked and exhibit good cross regulation, due to the tight coupling within transformer T1. The -5 V output uses Zener diode VR1 as a post regulator.
Key Design Points
* * * All secondary winding should be wound in layers right next to each other, in order to assure the best cross regulation. Use foil for 3.3 V and 5 V secondary windings for the best cross regulation. The reflected output voltage (VOR) was set at 126 V to ensure good output voltages cross regulation. If tighter cross regulation is needed, a lower value of VOR could be used at the expense of reduced peak power delivery. The configuration of U5, Q1, R17 and D6 increases the speed of U5 and reduces pulse grouping. TRANSFORMER PARAMETERS Core Material PC40EF25-Z or equivalent Bobbin EF25 Horizontal 1/2 Primary: 32T, 31 AWG Bias: 9T, 0.45 mm Winding Details Secondary: Foil 2T, Foil 1T, 6T, 0.45 mm x 2 & 3T 0.25 mm 1/2 Primary: 32T, 31 AWG Winding Order (pin numbers) Primary (3-2), Bias (5-4), Secondary (9-10, 10-8, 7-8, 6-7), Primary (2-1) 342 H, 10%
95 85
Efficiency (%)
75 65 55 45 35 25
*
195 205 215 225 235 245 255 265
AC Input Voltage
Figure 2. Efficiency vs. Input Line Voltage at Full Load, Room Temperature, 50 Hz Line.
PI-4528-110906
110 105
Regulation (%)
100 95 90 85 80
3.3 V 5V -5 V 22 V 17.5 V
Primary Inductance
Table 1. Transformer Design Parameters.
TIW = Triple Insulated Wire, NC = No Connect, FL = Flying Lead
270
190
200
210
220
230
240
250
260
AC Input Voltage (VAC)
Figure 3. Output Regulation vs. Input Line Voltage, Room Temperature, Full Load.
For the latest updates, visit www.powerint.com Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. The products and applications illustrated herein (transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations' patents may be found at www.powerint.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm. The PI logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, PeakSwitch, EcoSmart, Clampless, E-Shield, Filterfuse, StackFET, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. (c)Copyright 2006, Power Integrations, Inc.
Rev. A 11/06
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